A Comparison of Evolvable Hardware Architectures for Classification Tasks

نویسندگان

  • Kyrre Glette
  • Jim Tørresen
  • Paul Kaufmann
  • Marco Platzner
چکیده

We analyze and compare four different evolvable hardware approaches for classification tasks: An approach based on a programmable logic array architecture, an approach based on two-phase incremental evolution, a generic logic architecture with automatic definition of building blocks, and a specialized coarse-grained architecture with pre-defined building blocks. We base the comparison on a common data set and report on classification accuracy and training effort. The results show that classification accuracy can be increased by using modular, specialized classifier architectures. Furthermore, function level evolution, either with predefined functions derived from domain-specific knowledge or with functions that are automatically defined during evolution, also gives higher accuracy. Incremental and function level evolution reduce the search space and thus shortens the training effort.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

On Feasibility of Adaptive Level Hardware Evolution for Emergent Fault Tolerant Communication

A permanent physical fault in communication lines usually leads to a failure. The feasibility of evolution of a self organized communication is studied in this paper to defeat this problem. In this case a communication protocol may emerge between blocks and also can adapt itself to environmental changes like physical faults and defects. In spite of faults, blocks may continue to function since ...

متن کامل

FPGA-based Systems for Evolvable Hardware

Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware (EHW), a period of intense creativity has followed. It has been actively researched, developed and applied to various problems. Different approaches have been proposed that created three main classifications: extrinsic, mixtrinsic and intrinsic EHW. Each of these solutions has a real interest. Nevertheless,...

متن کامل

An Online EHW Pattern Recognition System Applied to Sonar Spectrum Classification

An evolvable hardware (EHW) system for high-speed sonar return classification has been proposed. The system demonstrates an average accuracy of 91.4% on a sonar spectrum data set. This is better than a feed-forward neural network and previously proposed EHW architectures. Furthermore, this system is designed for online evolution. Incremental evolution, data buses and high level modules have bee...

متن کامل

Speed Enhancement with Soft Computing Hardware

During the past few years JPL has been actively involved in soft computing research encompassing theory, architecture, and electronic hardware applications. There are a host of soft computing applications that require orders of magnitude enhancement in speed compared to that obtained using simulations on digital machines. For on-board computing this is made possible by selecting suitable algori...

متن کامل

Decrease in Hardware Consumption and Quantization Noise of Digital Delta-Sigma Modulators and Implementation by VHDL

A new structure is presented for digital delta-sigma modulator (DDSM). Novel architecture decreases hardware consumption, output quantization noise and spurs in Comparison to previous architectures. In order to reduce the delay, power consumption and increase maximum working frequency, the pipelining technique and the carry skip adder are used. Simulation proposed architecture shows that the qu...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2008